RF Phase-lock Loop
基本释义:
射频锁相环
网络释义
1)RF Phase-lock Loop,射频锁相环
2)frequency and phase lock loop,锁频锁相环
3)single-chip-microcomputer,音频锁相环
4)FPLL,锁频销相环
5)Mixing PLL,混频锁相环
6)Phase Locked Loop Frequency Doubler,锁相环倍频器
用法和例句
A frequency and phase lock loop for carrier recovery;
用作载波恢复的锁频锁相环
High definition television system,whose carrier recovery adopt the technology of frequency and phase lock loop, is in the order of multi\|level vestigial sideband modulated(8\|VSB) transmission system of the Grand Alliance of Americcan.
以美国大联盟（ Ｇｒａｎｄ Ａｌｌｉａｎｃｅ） 的多电平残留边带调制（８ Ｖ Ｓ Ｂ） 传输系统为代表的高清晰度电视制式，其载波恢复采用了锁频锁相环（ Ｆ Ｐ Ｌ Ｌ） 技术。
Analysis and Application Design of RF PLL Frequency Synthesizer;
射频锁相环频率合成器的分析与设计
Special PLL used in target RF simulation of the radio detonator
引信目标射频仿真中的特殊锁相环路
Analysis and Design of RF Oscillator and PLL Architecture;
射频振荡器与锁相环结构分析与设计
A Low-Power RF CMOS Charge Pump PLL
一种低功耗射频CMOS电荷泵锁相环的设计
Behavior Modeling of PLL and Its Application in Video Horizontal PLL
锁相环行为级建模及在视频行锁相中的应用
Research of the 2.1G-2.7G DDS Hybrid PLL Frequency Synthesizer;
2.1G-2.7G锁相DDS射频信号源的研制
A PLL Frequency Synthesizer with High Multiple-Frequency
一种多倍频选择的高倍频锁相环频率合成器
Modeling, Design and Implementation of Phase-locked Loop Frequency Synthesizer;
锁相环频率合成器建模、设计与实现
Design of PLL Frequency Synthesizer Based on CMOS Techniques;
基于CMOS工艺的锁相环频率合成器设计
Design of a Fully Differential 1GHz CMOS PLL Frequency Synthesizer;
全差分1GHzCMOS锁相环频率综合器设计
Application Study of Using Phase-Locked Loops Technology in Freguency Combination;
锁相环在频率合成技术中的应用研究
The Improvement of Thyristor Power Supply Device Based on Synchronous Circuit of Phase Locked Loop and Frequency Multiplier;
基于锁相环倍频同步电路的电源改进
Design of a Charge Pump Phase-Locked Loop for Frequency Synthesizer
用于频率合成器的电荷泵锁相环设计
Study of improving phase noise in thePLL based on PLL frequency synthesizer
基于PLL频率合成器锁相环的降噪技术
Research of frequency synthesizer based on phase-locked loop technology
基于锁相环技术的频率合成器的研究
The Design of Charge Pump PLL Frequenc Synthesizer
一种电荷泵锁相环频率合成器的设计
Research on frequency characteristic optimizing technique of PLL HC4046
HC4046锁相环频率特性优化技术研究
Design of Fourth-Order PLL Synthesizer
一种四阶锁相频率合成器的环路设计
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