基本释义:

总线控制处理器

网络释义

1)BCP Bus Control Processor,总线控制处理器

2)LCP Line Control Processor,线路控制处理器

3)Processor bus,处理器总线

4)bus controller,总线控制器

5)controller bus,控制器总线

6)bus control unit,总线控制器

用法和例句

Realization of 1553B bus controller based on FPGA;

基于FPGA的1553B总线控制器的实现

SERCOS bus controller SERCON816 and its application;

SERCON816型SERCOS总线控制器及其应用

After introducing the data bus protocol of 1553B simply,this paper mainly discusses the design thinking and method of bus controller by using software,and PCCARD-D1553 card.

在简单介绍1553B数据总线协议的基础上,主要讨论了利用软件和PCCARD D1553板卡实现总线控制器的设计思想和方法,这种方法在不需要利用硬件实现总线控制器且开发周期要求较短的工程中是非常实用和有效的。

Described in this article are the microcomputer controlled 3 level control system of the locomotive, the computer network made up of train bus,vehicle bus and controller bus,as well as the key technology to achieve locomotive double heading control.

文章介绍了机车微机系统的三级控制及由列车总线、车厢总线、控制器总线组成的计算机网络，以及实现机车重联控制的技术关键。

Research and Implementation of Key Technologies of System Bus in X Processor;

X处理器总线的关键技术研究与实现

Design and Verification of the Bus Interface Unit in X Microprocessor;

X微处理器总线接口单元的设计及验证

interprocessor bus driver

处理机间总线驱动器

Design of Multiprocessor Parallel System Based on Vxibus;

基于VXI总线的多DSP处理器模块的设计

JPEG Decoding Coprocessor Based on FSL Bus

基于FSL总线的JPEG解码协处理器

The Research of Vxibus Based Radio Direction Finding Processor;

基于VXI总线的无线电测向处理器的研究

The FPGA Implementation and Research of the Embedded USB Device Processor;

嵌入式USB总线器件端处理器的FPGA实现研究

BBL Back-side Bus Logic. Logic for interface to the back-side bus for accesses to the internal unified level two processor cache.

后端总线逻辑。访问内部统一二级处理器缓存的后端总线接口逻辑。

Development of USB Bus of Embedded System Based on ARM9 Processor;

基于ARM9处理器开发平台上USB总线的应用研发

The Design and Verify of MIL-STD-1553B Based on IP Technology;

军用1553B数据总线协议处理器IP核的设计与验证

Design and Study of Soft Core of 8-bit Microprocessor and Interface of IIC Bus;

8位微处理器与IIC总线接口软核的设计与研究

Study on Performance Evaluation of Network Processor High-bandwidth Data Bus Interface

网络处理器高带宽数据总线接口性能评估研究

Research on High-bandwidth Data Bus Interface of Network Processor

网络处理器高带宽数据总线接口模块设计研究

Special Bus Design Method of ARM Processor Based on Windows CE

基于Windows CE的ARM9处理器专用总线设计方法

Design of CPCI Bus Intelligent Collectting Board on Based DSP Processor

基于DSP处理器的CPCI总线智能采集板设计

A Study on Different Bus Design for ARM Processor S3C2410 and CAN Controller SJA1000

ARM处理器S3C2410与SJA1000不同总线类型的接口设计研究

An Implementation of the ARM-Based PC/104 Embedded Computer System

基于ARM处理器的PC/104总线嵌入式计算机的设计

As the number of processors increases in a server, so does the amount of traffic on the bus.

随着一台服务器中处理器数量的增加，总线上的信息流量也增加。